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Software Utilities

Machine Control

zenpire

Defect, BitCell, Test, Data Transfer and Storage Software

Zenpire
 
iFAB-Bit Module

Zenpire  Products 
  iFAB-Defect
  iFAB-Test   
  iFAB-Setup    
  iFAB-Bit 
  iFAB-Pixel
  iFAB-Utilities   
  iFAB-Central 
  iFAB-FA                                 
Summary

Bitmapping one of the most complicated and data intensive process steps in the the semiconductor fab. Scrambling of address lines, quantity of bits per die, quantity of die per wafer, and now a larger selection of products with embedded memory have demanded much effort from the test and yield engineers responsible for those memory products. iFAB-Bit simplifies the organization and translation of the masses of data coming from the testers with innovative techniques.

iFAB-Bit utilizes the iFAB plug-in architecture to handle the placement of bits within a die and the scrambling of addresses from test vectors to physical row and columns to physical positions. iFAB plug-ins employ an intuitive Application Programming Interface (API) and Java Beans which are easily developed in the field by customers or by Zenpire Consulting. A device plug-in is compiled Java code; however unlike C+++ modules, Java code is well supported with free development tools that provide editors and debuggers for most operating systems (Windows 95, 98, NT; Solaris; HP-UX, and Apple). iFAB-Bit also has tools to debug the scrambling and positioning logic of the plug-in. Since most memory devices are based on previous products, creating a new plug-in is as simple a copying a one plug-in Java class, changing the quantity of row or columns, and recompiling using a free Java compiler. Because Java plug-ins are code rather than lookup tables, conversions are quick and require little memory.

Bit failure classification analysis also uses a series of iFAB plug-ins. The iFAB-Bit module can load in a series of classification beans and provide them with parameters (such as test name, row count, column count, block name). Output of classifications (such as row or column failure, single bit failure, vertical bit pair failure) can be sent to a flat text file or a defect file (KLARF) for loading into a yield analysis system. Additionally, iFAB-Bit can save the bit failures of a die to a GDS-II layer file for import and overlay within a CAD tool.

iFAB-Bit functions as bitmap viewing and data validation software. iFAB-Bit can load data directly from the tester (providing that a custom plug-in has been created for that file format), translate the addresses, perform failure classifications, and save the failures with their physical locations to a file. As a viewer, iFAB-Bit borrows technology from the iFAB-Defect module to handle the wafer map displays including measuring distances between bits, and magnification of displays. Combined with iFAB-Central, this process can be attached to a loader which can move files to any directory on the site's network and into the iFAB database. Combined with iFAB-FA, iFAB provides failed bit locations used to position a microscope to.

iFAB-Bit is not yet released, contact Zenpire Sales for availability.

Benefits
  • Runs on all major platforms
  • Similar interface to all other iFAB modules (Defect, Setup, FA, Test)
  • Easy to use interface (engineers AND operators can use)
  • Uses Java Beans as plug-ins to simplify the device setup process, since Java development tools are free, lowers cost of product introduction
  • Uses Java Bean as plug-ins to provide modularity to the bit failure classification process
  • Saves raw bit map data as standard Windows bitmap image files for easy editing and storage (1 bit, 8 bit, 24 bit color depth - where each bit represents the results of one bit map test.
  • Classified failures can be exported to defect files (KLARF, TFF) for loading into a third party yield analysis system. (overlay failed bits to defects)
  • Classified failures can be exported to design files (GDS-II) for importing into a CAD tool (overlay failed bits to product layout)
Potential Users
  • Yield engineers needing to analyze bit failures to trace process sensitivities
  • Test engineers using bit results to quickly determine test program bugs based on failure patterns or post-program memory fetches
  • Design engineers who easily want to look for design sensitivities and layout issues.
Screen Captures
None
Pricing and Availability
Refer to the pricing table here. This product will be available on 15 February 2001.

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